Panasonic MN101L Series

<Contents - 8>
13.4.2 Operation ..................................................................................................................... XIII-48
13.4.3 Timing.......................................................................................................................... XIII-52
13.4.4 Setting procedure......................................................................................................... XIII-54
13.5 IIC Communication.................................................................................................................... XIII-56
13.5.1 Format.......................................................................................................................... XIII-56
13.5.2 Operation ..................................................................................................................... XIII-57
13.5.3 Timing.......................................................................................................................... XIII-62
13.5.4 Setup Example............................................................................................................. XIII-68
Chapter 14 DMA Controller ............................................................................................. XIV-1
14.1 Overview...................................................................................................................................... XIV-2
14.1.1 Block Diagram............................................................................................................... XIV-3
14.2 DMA Controller Control Registers.............................................................................................. XIV-4
14.2.1 DMA Control Register................................................................................................... XIV-5
14.2.2 DMA Source Address Register...................................................................................... XIV-9
14.2.3 DMA Destination Address Register ............................................................................ XIV-10
14.2.4 DMA Transfer Word Count Register .......................................................................... XIV-11
14.3 DMA Data Transfer ................................................................................................................... XIV-12
14.3.1 Single Transfer Mode .................................................................................................. XIV-12
14.3.2 Burst Transfer Mode.................................................................................................... XIV-13
Chapter 15 Buzzer.............................................................................................................. XV-1
15.1 Overview....................................................................................................................................... XV-2
15.2 Control Register ............................................................................................................................ XV-3
15.2.1 Registers.......................................................................................................................... XV-3
15.2.2 Buzzer Control Register.................................................................................................. XV-4
15.3 Operation....................................................................................................................................... XV-5
15.3.1 Operation ........................................................................................................................ XV-5
15.3.2 Setup Example................................................................................................................ XV-6
Chapter 16 A/D Converter (ADC) .................................................................................... XVI-1
16.1 Overview...................................................................................................................................... XVI-2
16.1.1 Functions........................................................................................................................ XVI-2
16.1.2 Block Diagram............................................................................................................... XVI-3
16.2 Control Registers.......................................................................................................................... XVI-4
16.2.1 Registers......................................................................................................................... XVI-4
16.2.2 Control Registers ........................................................................................................... XVI-5
16.2.3 Data Buffers................................................................................................................... XVI-7