Panasonic MN101L Series

Chapter 7
I/O Port
VII - 44 Port 3
Table:7.7.3 P31 Function Selection
*1 When the LSI is the master of Clock-synchronous communication or communicates on IIC bus,
set the P3DIR.P3DIR1 to "1".
Table:7.7.4 P32 Function Selection
*1 When the LSI outputs the chip select signal, set the P3DIR.P3DIR2 to "1".
Table:7.7.5 P33 Function Selection
Table:7.7.6 P34 Function Selection
Setup Function
Register LCCTR4 SC1MD1 SC01SEL
Bit name SEGSL34 SC1SBTS SC1SEL2
1 - - SEG34
0
1 (*1) 0 SBT1A
0-P31
Setup Function
Register LCCTR4 SC1MD3 SC01SEL
Bit name SEGSL33 SC1SBCSEN SC1SEL3
1 - - SEG33
0
1 (*1) 0 SBCS1A
0-P32
Setup Function
Register LCCTR4 BUZCNT
Bit name SEGSL32 BUZEN BUZSEL
1 - SEG32
0
10BUZA
0-P33
Setup Function
Register LCCTR4 TMIOEN0 TM4MD TMIOSEL0 TMIOEN1 TM7MD1 TMIOSEL1 BUZCNT
Bit name
SEGSL31 TM4OEN
TM4CK
1-0
TM4IOSEL TM7OEN
TM7CK
1-0
TM7IOSEL
1-0
NBUZEN NBUZSEL
1 - - - - - - - SEG31
0
1
Other than
11
00
Other than
10
- 0 - TM4IO (output)
011 0 0
Other than
10
- 0 - TM4IO (input)
0
Other than
11
-
1
Other than
10
01 0 - TM7IO (output)
0
10 01 0 - TM7IO (input)
Other than
10
-
10NBUZA
0- P34