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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 7
I/O Port
Port 4 VII - 47
Table:7.8.4 P42 Function Selection
*1 When serial data is output, set the P4DIR.P4DIR2 to "1".
*2 When serial data is input and output, set the bit to "1".
Table:7.8.5 P43 Function Selection
*1 When the LSI is the master of Clock-synchronous communication or communicates on IIC bus,
set the P4DIR.P4DIR3 to "1".
Table:7.8.6 P44 Function Selection
*1 When the LSI outputs the chip select signal, set the P4DIR.P4DIR4 to "1".
Table:7.8.7 P45 Function Selection
Setup Function
Register LCCTR3 SC2MD1 SC23SEL
Bit name SEGSL25 SC2SBOS SC2SBIS SC2IOM SC2SEL1
1----SEG25
0
1 (*1) - (*2) - (*2) 0
SBO2A/
SDA2A
0
110
00-P42
Setup Function
Register LCCTR3 SC2MD1 SC23SEL
Bit name SEGSL24 SC2SBTS SC2SEL2
1 - - SEG24
0
1 (*1) 0 SBT2A/SCL2A
0- P43
Setup Function
Register LCCTR3 SC2MD2 SC23SEL
Bit name SEGSL23 SC2SBCSEN SC2SEL3
1 - - SEG23
0
1 (*1) 0 SBCS2A
0-P44
Setup Function
Register LCCTR3 SC1MD1 SC01SEL
Bit name SEGSL22 SC1SBIS SC1IOM SC1SEL0
1 - - - SEG22
0
1 0 1 SBI1B/RXD1B
00- P45

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