Panasonic MN101L Series

Chapter 1
Overview
Hardware Features I - 3
• Interrupt Circuit
- 31 internal interrupts (except for NMI)
- 8 external interrupts
* MN101LR02D:
- 29 internal interrupts (except for NMI)
- 3 external interrupts
• DMA (1 channel)
- Data transfer size : 8 bits/16 bits
- Maximum transfer counts: 1023
- Activation trigger : external interrupts / internal interrupts / software (setting the DMA start bit)
• Watchdog Timer (WDT)
- Function : 1st watchdog time-out generates NMI, and 2nd consecutive time-out generates a LSI reset.
- Clock Source : WDTCLK (SOSCCLK or SRCCLK)
• Timer Counter: 13 units
- General-purpose 8-bit timer (Timer 0/1/2/3/4/5): 6 units
- General-purpose 16-bit timer (Timer 7/8/9) : 3 units
- 8-bit free-run (Timer 6) /Time-base timer : 1 unit each
- RTC time base timer (RTC-TBT) : 1 unit
- Real Time Clock (RTC) : 1 unit
<Timer 0>
- Function : Square wave output, additional pulse PWM output, event count,
simple pulse width measurement
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/32, HCLK/64, SCLK, SYSCLK/2, SYSCLK/4,
and TM0IO input
<Timer 1 >
- Function : Square wave output, event count, 16-bit cascade connection (connected with Timer 0)
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/64, HCLK/128, SCLK, SYSCLK/2, SYSCLK/8,
and TM1IO input
<Timer 2>
- Function : Square wave output, additional pulse PWM output, event count,
simple pulse width measurement
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/32, HCLK/64, SCLK, SYSCLK/2, SYSCLK/4,
and TM2IO input
<Timer 3 >
- Function : Square wave output, event count, 16-bit cascade connection (connected with Timer 2)
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/64, HCLK/128, SCLK, SYSCLK/2, SYSCLK/8,
and TM3IO input
<Timer 4>
- Function : Square wave output, additional pulse PWM output, event count,
simple pulse width measurement
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/32, HCLK/64, SCLK, SYSCLK/2, SYSCLK/4,
and TM4IO input
<Timer 5 >
- Function : Square wave output, event count, 16-bit cascade connection (connected with Timer 4)
- Clock Source : HCLK, HCLK/4, HCLK/16, HCLK/64, HCLK/128, SCLK, SYSCLK/2, SYSCLK/8,
and TM5IO input
* MN101LR02D cannot be used square wave output, event count and TM5IO.