Panasonic MN101L Series

Chapter 9
16-bit Timer
IX - 8 16-bit Timer Control Registers
Binary counters are 16-bit up counters. If data is written to the preset register 1 (TMnPR1L to TMnPR1H) while
the counting is stopped, the binary counter is cleared to "0x0000".
For Timer 7, the binary counters are cleared to "0x0000" while IGBT operation is disabled at IGBT setting. The
binary counters for Timer 7 and 8 can be cleared to "0x0000" at a capture operation while counting by setting the
register.
 Timer n Binary Counter (Lower 8 bits)
(TM7BCL: 0x03FA0, TM8BCL: 0x03FB0, TM9BCL: 0x03FC0)
 Timer n Binary Counter (Upper 8 bits)
(TM7BCH: 0x03FA1, TM8BCH: 0x03FB1, TM9BCH: 0x03FC1)
Input capture registers are registers that hold the value loaded from the binary counters at a capture trigger.
 Timer n Input Capture Register (Lower 8 bits)
(TM7ICL: 0x03FA6, TM8ICL: 0x03FB6, TM9ICL: 0x03FC6)
 Timer n Input Capture Register (Upper 8 bits)
(TM7ICH: 0x03FA7, TM8ICH: 0x03FB7, TM9ICH: 0x03FC7)
bp 76543210
Bit name TMnBCL7-0
At resetXXXXXXXX
AccessRRRRRRRR
bp 76543210
Bit name TMnBCH7-0
At resetXXXXXXXX
AccessRRRRRRRR
bp 76543210
Bit name TMnICL7-0
At resetXXXXXXXX
AccessRRRRRRRR
bp 76543210
Bit name TMnICH7-0
At resetXXXXXXXX
AccessRRRRRRRR