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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 9
16-bit Timer
IX - 22 16-bit Timer
Count Timing of Timer Operation (Timer 7, Timer 8 and Timer 9)
This is the basic operation for all functions of 16-bit timer.
Figure:9.3.1 Count Timing of Timer Operation (Timer 7, Timer 8 and Timer 9)
(A) If data are written to the preset register while the count operation is disabled (the TMnEN bit is set to "0"),
the same data are loaded to the compare register and the binary counter is cleared to "0x0000" at the next
count clock.
(B) When activating the counter by setting the TMnEN bit to "1", the internal enable is set at the next count
clock. Then, the binary counter starts counting up from the next count clock where the internal enable has
been set. The count operation is executed at the rising edge of the count clock.
(C) Even if the preset register is rewritten while the count operation is enabled (the TMnEN bit is set to "1"),
the binary counter is not changed.
(D) When the value of binary counter matches the setting value of compare register 1, the setting value of the
preset register is loaded to the compare register and an interrupt request is generated at the next count clock.
And the binary counter is cleared to "0x0000" and restarts counting up
(E) When the count operation is disabled (the TMnEN bit is set to "0"), the binary counter is stopped.
0002 0003
NM
0000 0001 0002 N-1
N
0000 0001
Count
clock
TMnEN
bit
Internal
enable
Compare
register
Binary
counter
Interrupt
request
(A) (B)
(C)
(D)
(E)
NM
Preset
register
(A)
(A)

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