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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 10
General-Purpose Time Base/Free-Running Timer
Time Base Timer X - 13
Count Timing of Timer Operation (Time Base Timer)
The counter counts up with the selected clock source as a counter clock.
Figure:10.4.1 Count Timing of Timer Operation (Time Base Timer)
When the selected interrupt cycle elapsed, the time base interrupt request (PERI0DT2) of the
peripheral function
group 0 interrupt factor register (PERI0DT)
is set to "1".
..
Stop the timer when switching the count clock. If the count clock is changed during counting,
the timer doesn't count correctly.
..
..
The timer can be initialized by writing an arbitrary value to the time base timer clear control
register (TBCLR).
..
13
1/2
1214 11109876543210
f
HCLK
f
SCLK
MUX
7
1/2
8
1/2
9
1/2
10
1/2
13
1/2
12
1/2
14
1/2
15

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