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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 13
Serial Interface
XIII - 40 Clock-Synchronous Communication
Reception Timing
Figure:13.3.13 Reception Timing (At Rising Edge, SCnCKPH bit = 0)
Figure:13.3.14 Reception Timing (At Falling Edge, SCnCKPH bit = 0)
T
Communication
completion interrupt
(Set data to
TXBUFn)
SCnRBSY
Writing period to TXBUFn
(when consecutive communication mode)
SBOn/SBIn
SBTn
1st
Bit
2nd
Bit
3rd
Bit
4th
Bit
5th
Bit
6th
Bit
7th
Bit
8th
Bit
Twait
(=3.5T)
T
Communication
completion interrupt
(Set data to
TXBUFn)
SCnRBSY
Twait
(=3.5T)
Writing period to TXBUFn
(when consecutive communication mode)
SBOn/SBIn
SBTn
1st
Bit
2nd
Bit
3rd
Bit
4th
Bit
5th
Bit
6th
Bit
7th
Bit
8th
Bit

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