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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 13
Serial Interface
IIC Communication XIII - 63
Master Reception Timing
Figure:13.5.8 Master Reception Timing
(1) Generate start condition by setting data to TXBUFn
(2) Transmit Address data (slave address + R/W bit)
(3) Receive ACK bit
(4) Set SCnMD3.IIC3REX to "1" and write dummy data to TXBUFn in interrupt handler
(5) Receive data
(6) Transmit NACK bit
(7) Set SCnMD3.IIC3STPC in interrupt handler
(8) Generate stop condition
12
. . . .
8 ACK 1 2 8
NACK
address data
transmission
8 bits reception
(1) (2) (3) (4) (5) (6) (8)(7)
SDAn
SCLn
SCnTIRQ
IIC3BUSBSY
Set data to TXBUFn Set IIC3STPCSet dummy data to TXBUFn

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