Chapter 2
CPU
II - 10 Overview
Figure:2.1.6 Addressing Mode
Addressing Modes
Register direct
Dn / DWn
An / SP
PSW
imm4 / imm8
imm16
( An )
( d8, An )
( d16, An )
( d4, PC )
( branch instruction
only )
( d7, PC )
( branch instruction
only )
( d11, PC )
( branch instruction
only )
( d12, PC )
( branch instruction
only )
( d16, PC )
( branch instruction
only )
( d4, SP )
( d8, SP )
( d16, SP )
( abs8 )
( abs8 )
( io8 )
( HA )
( abs12 )
( abs16 )
( abs18 )
( branch instruction
only )
( abs20 )
( branch instruction
only )
Immediate
Register indirect
Stack relative
indirect
Absolute
RAM short
I/O short
Handy
Register relative
indirect
Effective address Description
Reuses the memory address accessed and is only
available with the MOV and MOVW instructions.
Combined use with absolute addressing reduces code
size.
Specifies the address using an address register.
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
The value of SBNKR
or DBNKR
"0x0"
The value of SBNKR
or DBNKR
"0x0"
"0x0"
"0x0"
Directly specifies the register. Only internal registers can
be specified.
Directly specifies the operand or mask value appended
to the instruction code.
Specifies the address using an address register with 8-
bit displacement.
Specifies the address using an address register with 16-
bit displacement.
Specifies the address using stack pointer with 4-bit
displacement.
Specifies the address using stack pointer with 8-bit
displacement.
Specifies the address using stack pointer with 16-bit
displacement.
Specifies an 8-bit offset from the address "0x00000".
Specifies an 8-bit offset from the top address of the
special function register area ( "0x03F00" ).
Specifies the address using operand value appended to
the instruction code. Optimum operand length can be
used to specify the address.
Specifies the address using the program counter with
4-bit displacement and H bit.
Specifies the address using the program counter with
7-bit displacement and H bit.
Specifies the address using the program counter with
11-bit displacement and H bit.
Specifies the address using the program counter with
12-bit displacement and H bit.
Specifies the address using the program counter with
16-bit displacement and H bit.
Higher 4-bit of data access
address when bank addre-
ssing is enabled.
0
An
15
0
An + d8
15
H019
PC + d4
H019
PC + d7
H019
PC + d11
H019
PC + d12
*1
*1
*1
*1
*1
*1
*1
*1 H : half-byte bit
H019
PC + d16
H019
abs20
H017
abs18
0
An + d16
15
0
SP + d4
15
0
SP + d8
15
0
SP + d16
15
abs8
07
abs8
07
015
abs16
abs12
011
IOTOP + io8
019
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