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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 2
CPU
II - 12 Overview
Bank Register for Source Address (SBNKR: 0x03F0A)
The SBNKR is used to specify bank area for loading instruction. Once this register is specified, bank control is
valid for all addressing modes except I/O short instruction and stack relative indirect instruction.
Refer to [2.1.8 Addressing Modes]
Bank Register for Destination Address (DBNKR: 0x03F0B)
The DBNKR is used to specify bank area for storing instruction. Once this register is specified, bank control is
valid for all addressing modes except I/O short instruction, stack relative indirect instruction and bit manipulation
instruction.
Refer to [2.1.8 Addressing Modes]
..
Bit manipulation instruction depends on the value of the SBNKR register, both of for reading
and writing.
..
bp 76543210
Bit name----ReservedReservedReservedSBA0
At reset00000000
AccessRRRRR/WR/WR/WR/W
bp Bit name Description
7-4 - Always read as 0.
3-1 Reserved Must be set to 0.
0 SBA0
Assignment of bank for source data access address
0: bank 0
1: bank 1
bp 76543210
Bit name----ReservedReservedReservedDBA0
At reset00000000
AccessRRRRR/WR/WR/WR/W
bp Bit name Description
7-4 - Always read as 0.
3-1 Reserved Must be set to 0.
0 DBA0
Assignment of bank for destination data access address
0: bank 0
1: bank 1

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