Samsung S3F84B8 - COM - Complement

S3F84B8_UM_REV 1.00 6 INSTRUCTION SET
6-28
6.3.16 COM — COMPLEMENT
COM dst
Operation: dst  NOT dst
The contents of destination location are complemented (one’s complement); all “1’s” are changed
to “0’s”, and vice versa.
Flags: C: Unaffected.
Z: Set if the result is “0”; cleared otherwise.
S: Set if the result bit 7 is set; cleared otherwise.
V: Always reset to “0”.
D: Unaffected.
H: Unaffected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst
opc dst 2 4 60 R
4 61 IR
Examples: Given R1 = 07H and register 07H = 0F1H:
COM R1  R1 = 0F8H
COM @R1  R1 = 07H, register 07H = 0EH
In the first example, destination working register R1 contains the value 07H (00000111B). The
statement “COM R1” complements all the bits in R1: all logic ones are changed to logic zeros,
and vice-versa, leaving the value 0F8H (11111000B).
In the second example, Indirect Register (IR) addressing mode is used to complement the value
of destination register 07H (11110001B), leaving the new value 0EH (00001110B).