S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS
4-21
4.1.21 OPACON — OP AMP CONTROL REGISTER: E0H, BANK1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESET Value
– – – – – – 0 0
Read/Write
– – – – – – R/W R/W
.7–.2 Not used for S3F84B8.
OP AMP Mode Select Bit
0 Off chip mode (External positive input)
.1
1 On chip mode (Internal ground level positive input)
OP AMP Enable Bit
0 Disables OP AMP.
.0
1 Enables OP AMP.