S3F84B8_UM_REV 1.00 12 TIMER 0
12-7
Timer C Prescaler Register (TCPS)
E6H, Set1, Bank1, R/W
LSBMSB.7.6.5.4.3.2.1.0
Reset Value: 00h
Timer C clock source selection bit
0 = Internal clock source
1 = CMP0 output
Not used for S3F84B8
Timer C prescaler bit (TCPSB)
TC CLK = fxx/(2^TCPSB)
NOTE: Pre-scalar values(TCPSB)
above 12
are invalid
Figure 12-5 Timer C Prescaler Register (TCPS)
Timer D Prescaler Register (TDPS)
EAH, Set1, Bank1, R/W
LSBMSB.7.6.5.4.3.2.1.0
Reset Value: 00h
Not used for S3F84B8
Timer D prescaler bit (TDPSB)
TC CLK = fxx/(2^TDPSB)
NOTE: Pre-scalar values(TDPSB) above 12 are invalid
Figure 12-6 Timer D Prescaler Register (TDPS)