S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS
4-19
4.1.19 IPR — INTERRUPT PRIORITY REGISTER: FFH, BANK0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
x x x x x x x x
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
Priority Control Bits for Interrupt Groups A, B, and C (Note)
0 0 0 Group priority undefined
0 0 1 B > C > A
0 1 0 A > B > C
0 1 1 B > A > C
1 0 0 C > A > B
1 0 1 C > B > A
1 1 0 A > C > B
.7, .4, and .1
1 1 1 Group priority undefined
Interrupt Subgroup C Priority Control Bit
0 IRQ6 > IRQ7
.6
1 IRQ7 > IRQ6
Interrupt Group C Priority Control Bit
0 IRQ5 > (IRQ6, IRQ7)
.5
1 (IRQ6, IRQ7) > IRQ5
Interrupt Subgroup B Priority Control Bit
0 IRQ3 > IRQ4
.3
1 IRQ4 > IRQ3
Interrupt Group B Priority Control Bit
0 IRQ2 > (IRQ3, IRQ4)
.2
1 (IRQ3, IRQ4) > IRQ2
Interrupt Group A Priority Control Bit
0 IRQ0 > IRQ1
.0
1 IRQ1 > IRQ0
NOTE: Interrupt Group A - IRQ0, IRQ1
Interrupt Group B - IRQ2, IRQ3, IRQ4
Interrupt Group C - IRQ5, IRQ6, IRQ7