S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS
4-35
4.1.38 SYM — SYSTEM MODE REGISTER: DEH, BANK0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 – – x x x 0 0
Read/Write
R/W – – R/W R/W R/W R/W R/W
Tri-state External Interface Control Bit
(1)
0 Normal operation (disables tri-state operation).
.7
1 Sets the external interface lines to high impedance
(enables tri-state operation).
.6–.5 Not used for S3F84B8.
Fast Interrupt Level Selection Bits
(2)
0 0 0 IRQ0
0 0 1 IRQ1
0 1 0 IRQ2
0 1 1 IRQ3
1 0 0 IRQ4
1 0 1 IRQ5
1 1 0 IRQ6
.4–.2
1 1 1 IRQ7
Fast Interrupt Enable Bit
(3)
0 Disables fast interrupt processing.
.1
1 Enables fast interrupt processing.
Global Interrupt Enable Bit
(4)
0 Disables all interrupt processing.
.0
1 Enables all interrupt processing.
NOTE:
1. Since an external interface is not implemented, SYM.7 must always be ‘0’.
2. You can select only one interrupt level at a time for fast interrupt processing.
3. Setting SYM.1 to “1” enables fast interrupt processing for the interrupt level currently selected by SYM.2-SYM.4.
4. Following a reset, you must enable global interrupt processing by executing an EI instruction (not by writing a “1” to
SYM.0).
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