Samsung S3F84B8 - MULT - Multiply (Unsigned)

S3F84B8_UM_REV 1.00 6 INSTRUCTION SET
6-58
6.3.45 MULT — MULTIPLY (UNSIGNED)
MULT dst,src
Operation: dst  dst  src
The 8-bit destination operand (even register of register pair) is multiplied by the source operand
(8-bits), and the product (16-bits) is stored in register pair specified by destination address. Both
operands are treated as unsigned integers.
Flags: C: Set if the result is  255; cleared otherwise.
Z: Set if the result is “0”; cleared otherwise.
S: Set if the MSB of result is “1”; cleared otherwise.
V: Cleared.
D: Unaffected.
H: Unaffected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst src
Opc src dst 3 22 84 RR R
22 85 RR IR
22 86 RR IM
Examples: Given register 00H = 20H, register 01H = 03H, register 02H = 09H, and register 03H = 06H:
MULT 00H, 02H  Register 00H = 01H, register 01H = 20H, register 02H = 09H
MULT 00H, @01H  Register 00H = 00H, register 01H = 0C0H
MULT 00H, #30H  Register 00H = 06H, register 01H = 00H
In the first example, the statement “MULT 00H,02H” multiplies 8-bit destination operand (in the
register 00H of register pair 00H, 01H) by the source register 02H operand (09H). The 16-bit
product, 0120H, is stored in the register pair 00H, 01H.