Samsung S3F84B8 - BUZCON - BUZ Control Register: F7 H, BANK0

S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS
4-7
4.1.4 BUZCON — BUZ CONTROL REGISTER: F7H, BANK0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
RESET Value
0 0 0 0 0 0 0 0
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
Addressing Mode
Register addressing mode only
BUZ Input Clock Selection Code
0 0
f
OSC
/16
0 1
f
OSC
/32
1 0
f
OSC
/64
.7–.6
1 1
f
OSC
/128
BUZ Enable Bit
0 Disables BUZ.
.5
1 Enables BUZ.
.4–.0
BUZ Frequency = f
BUZ
/[(BUZCON.4–0)+1]2