S3F84B8_UM_REV 1.00 13 A/D CONVERTER
13-1
13 A/D CONVERTER
13.1 OVERVIEW OF A/D CONVERTER
The 10-bit analog-to-digital (A/D) converter (ADC) module uses successive approximation logic to convert analog
levels entering at one of the eight input channels to equivalent 10-bit digital values. Analog input level must lie
between the V
DD
and V
SS
values.
A/D converter has the following components:
Analog comparator with successive approximation logic
D/A convert logic
ADC control register (ADCON)
Eight multiplexed analog data input pins (ADC0–ADC7)
10-bit A/D conversion data output register (ADDATAH/L)
To initiate an analog-to-digital conversion procedure, write the channel selection data in the A/D converter control
register (ADCON). This way you can select one of the eight analog input pins (ADCn, n = 0–7) and set the
conversion start or enable bit (ADCON.0). The read-write ADCON register is located at the FAH address.
During a normal conversion, ADC logic initially sets the successive approximation register to 200H (the
approximate half-way point of a 10-bit register). This register is then updated automatically during each
conversion step. The successive approximation block performs 10-bit conversions for one input channel at a time.
You can dynamically select different channels by manipulating the channel selection bit value (ADCON.7–.5) in
the ADCON register.
To start the A/D conversion, you should set the enable bit (ADCON.0). When the conversion is complete, the end-
of-conversion (EOC) bit (ACON.3) is automatically set to 1; the result is dumped into the ADDATA register, where
it can be read. If the ADC interrupt is enabled (ADCON.4 = 1), an interrupt request will be generated. The A/D
converter then enters an Idle state. The contents of ADDATA must be read before another conversion starts; else
the previous result will be overwritten by next conversion result.
NOTE: Since the ADC does not use sample-and-hold circuitry, it is important that any fluctuations in the analog level at
ADC0–ADC7 input pins during a conversion procedure be kept to an absolute minimum. Any change in the input level,
due to circuit noise or other reasons, will invalidate the result.
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