9-38 Setting the SEL-351P Recloser Control Date Code 990430
SEL-351P Manual Técnico
Row
Bit
Definition
Primary
Application
39 PTRX2 Permissive trip 2 signal from DCUB logic (see
Figure 5.10)
PTRX Permissive trip signal to Trip logic (see Figure 5.7)
PTRX1 Permissive trip 2 signal from DCUB logic (see
Figure 5.10)
UBB1 Unblocking block 1 from DCUB logic (see
Figure 5.10)
UBB2 Unblocking block 2 from DCUB logic (see
Figure 5.10)
UBB Unblocking block to Trip logic (see Figure 5.11)
Z3XT Logic output from zone (level) 3 extension timer (see
Figure 5.14)
DSTRT Directional carrier start (see Figure 5.14) Output contact
assignment
40 NSTRT Nondirectional carrier start (see Figure 5.14)
STOP Carrier stop (see Figure 5.14)
BTX Block trip input extension (see Figure 5.14) Testing
TRIP Trip logic output asserted (see Figure 5.1) Output contact
assignment
OC** Asserts 1/4 cycle for Open Command execution (see
Figure 1.19)
Tripping,
Control
CC** Asserts 1/4 cycle for Close Command execution (see
Figure 1.20)
CLG Ground cold load pickup scheme enabled (see
Figures 1.3 and 1.4)
Control
NOMSG Recloser control mainboard hasn’t received message
from battery charger board for more than 10 seconds
41 67P2S Level 2 directional phase definite-time (short delay)
overcurrent element 67P2S timed out (derived from
67P2; see Figures 3.3 and 5.14)
Tripping in DCB
schemes
67N2S Level 2 directional neutral ground definite-time
(short delay) overcurrent element 67N2S timed out
(derived from 67N2; see Figures 3.8 and 5.14)
67G2S Level 2 directional residual ground definite-time
(short delay) overcurrent element 67G2S timed out
(derived from 67G2; see Figures 3.10 and 5.14)
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