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Texas Instruments TMS320C28x User Manual

Texas Instruments TMS320C28x
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Illegal-Instruction Trap
3-22
3.6 Illegal-Instruction Trap
Any one of the following three events causes an illegal-instruction trap:
- An invalid instruction is decoded (this includes invalid addressing modes).
- The opcode value 0000
16
is decoded. This opcode corresponds to the
ITRAP0 instruction.
- The opcode value FFFF
16
is decoded. This opcode corresponds to the
ITRAP1 instruction.
An illegal-instruction trap cannot be blocked, not even during emulation. Once
initiated, an illegal-instruction trap operates the same as a TRAP #19 instruc-
tion. The handling of an interrupt initiated by the TRAP instruction is described
in section 3.5.2. As part of its operation, the illegal-instruction trap saves the
return address on the stack. Thus, you can detect the offending address by
examining this saved value. For more information about the TRAP instruction,
see Chapter 6, C28x Assembly Language Instructions.

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Texas Instruments TMS320C28x Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS320C28x
CategoryProcessor
LanguageEnglish

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