Register Figures
A-7Register Quick Reference
Figure A−4. Interrupt flag register (IFR)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
RTOSINT DLOGINT INT14 INT13 INT12 INT11 INT10 INT9
R/W
0
1
RTOSINT not pending
RTOSINT pending
0
1
DLOGINT not pending
DLOGINT pending
0
1
INT14
not pending
INT14
pending
0
1
INT13 not pending
INT13
pending
0
1
INT12
not pending
INT12
pending
0
1
INT11
not pending
INT11
pending
0
1
INT10 not pending
INT10
pending
0
1
INT9
not pending
INT9
pending
R/W R/W R/WR/WR/W R/W R/W
RTOSINT flag bit
DLOGINT flag bit
INT14
flag bit
INT13
flag bit
INT12 flag bit
INT11
flag bit
INT10
flag bit
INT9
flag bit
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
INT8 INT7 INT6 INT5 INT4 INT3 INT2 INT1
R/W
0
1
INT8 not pending
INT8
pending
0
1
INT7 not pending
INT7
pending
0
1
INT6
not pending
INT6
pending
0
1
INT5 not pending
INT5
pending
0
1
INT4
not pending
INT4
pending
0
1
INT3
not pending
INT3
pending
0
1
INT2 not pending
INT2
pending
0
1
INT1
not pending
INT1
pending
R/W R/W R/WR/WR/W R/W R/W
INT8 flag bit
INT7
flag bit
INT6
flag bit
INT5
flag bit
INT4 flag bit
INT3
flag bit
INT2
flag bit
INT1
flag bit
Note: For more details about the IFR, see section 3.3.1 on page 3-7.