Memory Map
1-7Architectural Overview
1.3 Memory Map
The CPU contains no memory, but can access memory elsewhere on the C28x
DSP or outside the DSP.
The C28x uses 32-bit data addresses and 22-bit program addresses. This al-
lows for a total address reach of 4G words (1 word = 16 bits) in data space and
4M words in program space. Memory blocks on all C28x designs are uniformly
mapped to both program and data space. Figure 1−2 shows a high-level view
of how addresses are allocated in program space and data space.
The memory map in Figure 1−2 has been divided into the following segments:
- On-chip program/data
- Reserved
- CPU interrupt vectors
For specific details about each of the map segments, see the data sheet for
your DSP. See Appendix D for more information on the C2xLP compatible
memory space.
1.3.1 On-Chip Program/Data
All C28x-based CPU devices contain two blocks of single access on-chip
memory referred to as M0 and M1. Each of these blocks is 1K words in size.
M0 is mapped at addresses 00 0000
16
− 00 03FF
16
and M1 is mapped at ad-
dresses 00 0400
16
− 00 07FF
16
. Like all other memory blocks on the C28x de-
vices, M0 and M1 are mapped to both program and data space. Therefore, you
can use M0 and M1 to execute code or for data variables. At reset, the stack
pointer is set to the top of block M1.
Depending on the device, it may also have additional random-access memory
(RAM), read-only memory (ROM), or flash memory.
1.3.2 Reserved
Addresses 0000 0800−0000 09FF in data space are reserved for CPU Emula-
tion Registers on all C28x designs.
1.3.3 CPU Interrupt Vectors
Sixty-four addresses in program space are set aside for a table of 32 CPU in-
terrupt vectors. The CPU vectors can be mapped to the top or bottom of pro-
gram space by way of the VMAP bit. For more information about the CPU vec-
tors, see Section 3.2, Interrupt Vectors and Priorities on page 3-4.
For devices with a peripheral interrupt expansion (PIE) block, the interrupt vec-
tors will reside in the PIE vector table and this memory can be used as program
memory.
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