Types of Addressing Modes
5-2
5.1 Types of Addressing Modes
The C28x CPU supports four basic types of addressing modes:
- Direct Addressing Mode
DP (data page pointer): In this mode, the 16-bit DP register behaves like a
fixed page pointer. The instruction supplies a 6-bit or 7-bit offset field,
which is concatenated with the value in the DP register. This type of ad-
dressing is useful for accessing fixed address data structures, such as pe-
ripheral registers and global or static variables in C/C++.
- Stack Addressing Mode
SP (stack pointer): In this mode, the 16-bit SP pointer is used to access
information on the software stack. The software stack grows from low to
high memory on the C28x and the stack pointer always points to the next
empty location. The instruction supplies a 6-bit offset field that is sub-
tracted from the current stack pointer value for accessing data on the stack
or the stack pointer can be post-incremented or pre-decremented when
pushing and popping data from the stack, respectively.
- Indirect Addressing Mode
XAR0 to XAR7 (auxiliary register pointers): In this mode, the 32-bit XARn
registers behave as generic data pointers. The instruction can direct to
post-increment, pre/post-decrement, or index from the current register
contents with either a 3-bit immediate offset field or with the contents of
another 16-bit register.
- Register Addressing Mode
In this mode, another register can be the source or destination operand of
an access. This enables register-to-register operations in the C28x archi-
tecture.
On most C28x instructions, an 8-bit field in the instruction op-code selects the
addressing mode to use and what modification to make to that mode. In the
C28x instruction set, this field is referred to as:
- loc16
Selects Direct/Stack/Indirect/Register addressing mode for 16-bit data
access.
- loc32
Selects Direct/Stack/Indirect/Register addressing mode for 32-bit data
access.
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