Avoiding Unprotected Operations
4-17Pipeline
This program causes a misread. The TBIT instruction reads bit 15 (in the R2
phase) before the MOV instruction writes to bit 15 (in the W phase). If the TBIT
instruction reads a 1, the code prematurely ends the loop. Because DataA and
DataB reference different data-memory locations, the pipeline does not identi-
fy this conflict.
However, you can correct this type of error by inserting two or more NOP (no
operation) instructions to allow for the delay between the write to DataA and
the change to bit 15 of DataB. For example, if a 2-cycle delay is sufficient, you
can fix the previous code as follows:
MOV @DataA,#4 ; This write to DataA causes a
; peripheral to clear bit 15 of DataB.
NOP ; Delay by 1 cycle.
NOP ; Delay by 1 cycle.
$10: TBIT @DataB,#15 ; Test bit 15 of DataB.
SB $10,NTC ; Loop until bit 15 is set.
4.5.3 Write Followed By Read Protection Mode
The CPU contains a write followed by read protection mode to ensure that any
read operation that follows a write operation within a protected address range
is executed as written by delaying the read operation until the write is initiated.
See your device data sheet for device-specific information about which
memory region is write-followed-by-read protected.
The PROTSTART(15:0) and PROTRANGE(15:0) input signals set the protec-
tion range. The PROTRANGE(15:0) value is a binary multiple with the small-
est block size being 64 words, and the largest being 4M words (64 words, 128
words, 256 words ...1M words, 2M words, 4M words). The PROTSTART ad-
dress must always be a multiple of the chosen range. For example, if a 4K
block size is selected, then the start address must be a multiple of 4K.
The ENPROT signal enables this feature (when set high), it disables this fea-
ture (when set low)
All of the above signals are latched on every cycle. The above signals are con-
nected to registers and can be changed within the application program.
The above mechanism only works for reads that follow writes to the protected
area. Reads and write sequences to unprotected areas are not affected, as
shown in the following examples.
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