Multiply Operations
2-42
Figure 2−12. Conceptual Diagram of Components Involved in 16 X16-Bit Multiplication
T
P
ACC
Multiplier
MUX
From data memory or a register
16
From an instruction opcode
16
16 16
From data memory or a register
16
32
MUX
32
32
2.6.2 32-Bit X 32-Bit Multiplication
The C28x multiplier can also perform 32-bit by 32-bit multiplication.
Figure 2−13 shows the CPU components involved n this multiplication.
In this case, the multiplier accepts two 32-bit inputs:
- The first input is from one of the following:
J A program memory location. Some C28x 32 X 32 multiply MAC-type
instructions such as IMACL and QMACL take one data value directly
from memory using the program-address bus.
J The 32-bit multiplicand register (XT). Most 32 X 32-bit multiplication
instructions require that you load XT from data memory or a register
before you execute the instruction.
- A data-memory location or a register (depending on which you specify in
the multiply instruction).
After the two values have ben multiplied, 32 bits of the 64-bit result are stored
in the product register (P). You can control which half is stored (upper 32 bits
or lower 32 Bits) and whether the multiplication is signed or unsigned by the
instruction used.