Multiply Operations
2-41Central Processing Unit
2.6 Multiply Operations
The C28x features a hardware multiplier that can perform 16-bit X 16-bit or
32-bit X 32-bit fixed-point multiplication. This functionality is enhanced by
16-bit X 16-bit multiply and accumulate (MAC), 32 X 32 MAC, and
16-bit X 16-bit dual MAC (DMAC) instructions. This section describes the com-
ponents involved in each type of multiplication.
2.6.1 16-bit X 16-bit Multiplication
The C28x multiplier can perform a 16-bit X 16-bit multiplication to produce a
signed or unsigned 32-bit product. Figure 2−12 shows the CPU components
involved in this multiplication.
The multiplier accepts two 16-bit inputs:
- One input is from the upper 16 bits of the multiplicand register (T). Most
16 X 16 multiplication instructions require that you load T from a data-
memory location or a register before you execute the instruction. Howev-
er, the MAC and some versions of the MPY and MPYA instructions load
T for you before the multiplication.
- The other input is from one of the following:
J A data-memory location or a register (depending on which you specify
in the multiply instruction).
J An instruction opcode. Some C28x multiply instructions allow you to
include a constant as an operation.
After the value has been multiplied by the second value, the 32-bit result is
stored in one of two places, depending on the particular multiply instruction:
the 32-bit product register (P) or the 32-bit accumulator (ACC).
One special 16-bit X 16-bit multiplication instruction takes two 32-bit input val-
ues as its operands. This instruction is the 16 X 16 DMAC instruction, which
performs dual 16 X 16 MAC operations in one instruction. In this case, the ACC
contains the result of multiplying and adding the upper word of the 32-bit oper-
ands. The P register contains the result of multiplying and adding the results
of the lower word of the 32-bit operands.
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