Status Register (ST0)
2-33Central Processing Unit
Table 2−10. Instructions Affected by SXM
Instruction Description
ADD ACC,#16bit << shift Affected By SXM
ADD ACC,loc16 << shift Affected By SXM
ADD ACC,loc16 << T Affected By SXM
CLRC SXM SXM = 0
MOV ACC,#16bit << shift Affected By SXM
MOV ACC,loc16 << shift Affected By SXM
MOV ACC,loc16 << T Affected By SXM
SETC SXM SXM = 1
SFR ACC,1..16 Affected By SXM
SFR ACC,T Affected By SXM
SUB ACC,#16bit << shift Affected By SXM
SUB ACC,loc16 << shift Affected By SXM
SUB ACC,loc16 << T Affected By SXM
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