CPU Registers
2-9Central Processing Unit
Figure 2−4. Individually Accessible Halves of the XT Register
XT
T = XT(16:31) TL = XT(15:0)
2.2.3 Product Register (P, PH, PL)
The product register (P register) is typically used to hold the 32-bit result of a
multiplication. It can also be loaded directly from a 16- or 32-bit data-memory
location, a 16-bit constant, the 32-bit ACC, or a 16-bit or a 32-bit addressable
CPU register. The P register can be treated as a 32-bit register or as two inde-
pendent 16-bit registers: PH (high 16 bits) and PL (low 16 bits); see
Figure 2−5.
Figure 2−5. Individually Accessible Halves of the P Register
P
PH = P(31:16) PL = P(15:0)
When some instructions access P, PH, or PL, all 32-bits are copied to the ALU-
shifter block, where the barrel shifter may perform a left shift, a right shift, or
no shift. The action of the shifter for these instructions is determined by the
product shift mode (PM) bits in status register ST0. Table 2−3 shows the pos-
sible PM values and the corresponding product shift modes. When the barrel
shifter performs a left shift, the low order bits are filled with zeros. When the
shifter performs a right shift, the P register value is sign extended. Instructions
that use PH or PL as operands ignore the product shift mode.
For a complete list of instructions affected by PM bits, see Table 2−5 on page
2-20.
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