Registers
C-7C2xLP and C28x Architectural Differences
C.2.3 Status Register Changes
Figure C−3. Status Register Comparison Between C2xLP and C28x
C2xLP Status Register ST0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ARP OV OVM 1 INTM DP
R/W−X
R/W−0
R/W−X
R/W−1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
R/W−X
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Note: R = Read access; W = Write access; value following dash (−) is value after reset.
C28x Status Register ST0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OVC/OVCU PM
Á
V
Á
N
ÁÁ
Z
Á
C
Á
TC
Á
OVM
ÁÁ
SXM
R/W−000000
R/W−000
R/W−0
R/W−0
R/W−0
R/W−0
R/W−0
R/W−0
R/W−0
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Note: R = Read access; W = Write access; value following dash (−) is value after reset.
C2xLP Status Register ST1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ARB CNF TC SXM C 1 1 1 1 XF 1 1 PM
R/W−X
R/W−0
R/W−X
R/W−1
R/W−1
R/W−1
R/W−00
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Note: R = Read access; W = Write access; value following dash (−) is value after reset.
C28x Status Register ST1
7
6
5
4
3
2
1
0
IDLESTAT
EALLOW LOOP
SPA
VMAP
PAGE0
DBGM
INTM
R−0
R/W−0
R−0
R/W−0
R/W−1
R/W−0
R/W−1
R/W−1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
15−13
12
11
10
9
8
ARP XF M0M1MAP Reserved OBJMODE AMODE
R/W−000
R/W−0
R−1
R/W−0
R/W−0
R/W−0
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Notes: 1) R = Read access; W = Write access; value following dash (−) is value after reset; reserved bits are always 0s
and are not affected by writes.
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