Indirect Addressing Modes
5-11C28x Addressing Modes
AMODE ”loc16/loc32” Syntax Description
X *+XARn[AR0] ARP = n
32bitDataAddr(31:0) = XARn + AR0
Note: The lower 16-bits of XAR0 are added to the selected 32-bit register. Upper
16-bits of XAR0 are ignored. AR0 is treated as an unsigned 16-bit value.
Overflow into the upper 16-bits of XARn can occur.
Example(s):
MOVW DP,#Array1Ptr ; Point to Array1 Pointer location
MOVL XAR2,@Array1Ptr ; Load XAR2 with pointer to Array1
MOVB XAR0,#16 ; AR0 = 16, AR0H = 0
MOVB XAR1,#68 ; AR1 = 68, AR1H = 0
MOVL ACC,*+XAR2[AR0] ;; Swap contents of location Array1[16]
MOVL P,*+XAR2[AR1] ;; with the contents of location Array1[68]
MOVL *+XAR2[AR1],ACC ;;
MOVL *+XAR2[AR0],P ;;
AMODE ”loc16/loc32” Syntax Description
X *+XARn[AR1] ARP = n
32bitDataAddr(31:0) = XARn + AR1
Note: The lower 16-bits of XAR0 are added to the selected 32-bit register. Upper
16-bits of XAR0 are ignored. AR0 is treated as an unsigned 16-bit value.
Overflow into the upper 16-bits of XARn can occur.
Example(s):
MOVW DP,#Array1Ptr ; Point to Array1 Pointer location
MOVL XAR2,@Array1Ptr ; Load XAR2 with pointer to Array1
MOVB XAR0,#16 ; AR0 = 16, AR0H = 0
MOVB XAR1,#68 ; AR1 = 68, AR1H = 0
MOVL ACC,*+XAR2[AR0] ;; Swap contents of location Array1[16]
MOVL P,*+XAR2[AR1] ;; with the contents of location Array1[68]
MOVL *+XAR2[AR1],ACC ;;
MOVL *+XAR2[AR0],P ;;
AMODE ”loc16/loc32” Syntax Description
X *+XARn[3bit] ARP = n
32bitDataAddr(31:0) = XARn + 3bit
Note: The immediate value is treated as an unsigned 3-bit value.
Example(s):
MOVW DP,#Array1Ptr ; Point to Array1 Pointer location
MOVL XAR2,@Array1Ptr ; Load XAR2 with pointer to Array1
MOVL ACC,*+XAR2[2] ;; Swap contents of location Array1[2]
MOVL P,*+XAR2[5] ;; with the contents of location Array1[5]
MOVL *+XAR2[5],ACC ;;
MOVL *+XAR2[2],P ;;
Note: The assembler also accepts ”*XARn” as an addressing mode. This is the same encoding as the ”*+XARn[0]” mode.
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