Texas Instruments TMS320C28x User Manual

Indirect Addressing Modes
5-20
Reverse carry addition or reverse carry subtraction is used to implement bit−
reversed addressing as used in the re−ordering of data elements in FFT algo-
rithms. Typically, AR0 is initialized with the (FFT size) /2. The value of AR0 is
then added or subtracted, with reverse carry addition or subtraction, to gener-
ate the bit reversed address:
Reverse Carry Addition Example Is Shown Below (FFT size = 16):
XAR(ARP)(15:0) = 0000 0000 0000 0000
+ AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1000
+ AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 0100
+ AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1100
+ AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 0010
+ AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1010
......
Reverse Borrow Subtraction Example Is Shown Below (FFT size = 16):
XAR(ARP)(15:0) = 0000 0000 0000 0000
− AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1111
− AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 0111
− AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1011
− AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 0011
− AR0 = 0000 0000 0000 1000
−−−−−−−−−−−−−− −−−−−−−−−−−−−−−−−−−
XAR(ARP)(15:0) = 0000 0000 0000 1101
......
On the C28x, the bit reversed addressing is restricted to block size < 64K. This
is OK since most FFT implementations are much less than this.

Texas Instruments TMS320C28x Specifications

General

Brand	Texas Instruments
Model	TMS320C28x
Category	Processor
Language	English