ADD ACC,loc16 << #0..16
6-25
ADD ACC,loc16 << #0..16 Add Value to Accumulator
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
ADD ACC,loc16<<#0 1000 0001 LLLL LLLL 1 Y N+1
ADD ACC,loc16 << #1..15 0101 0110 0000 0100
0000 SHFT LLLL LLLL
1 Y N+1
ADD ACC,loc16 << #16 0000 0101 LLLL LLLL X Y N+1
ADD ACC,loc16<<0...15 1010 SHFT LLLL LLLL 0 − N+1
Operands ACC Accumulator register
loc16 Addressing mode (see Chapter 5)
#0..16 Shift value (default is ”<< #0” if no value specified)
Description Add the left shifted 16-bit location pointed to by the ”loc16” addressing mode
to the ACC register. The shifted value is sign extended if sign extension
mode is turned on (SXM = 1) else the shifted value is zero extended
(SXM = 0). The lower bits of the shifted value are zero filled:
if(SXM = 1) // sign extension mode enabled
ACC = ACC + S:[loc16] << shift value;
else // sign extension mode disabled
ACC = ACC + 0:[loc16] << shift value;
Flags and
Z
After the addition, the Z flag is set if ACC is zero, else Z is cleared.
Modes
N
After the addition, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
C
If the addition generates a carry, C is set; otherwise C is cleared.
Exception: If a shift of 16 is used, the ADD instruction can set C but not clear C.
V
If an overflow occurs, V is set; otherwise V is not affected.
OVC
If (OVM = 0, disabled) then if the operation generates a positive overflow, then
the counter is incremented and if the operation generates a negative
overflow, then the counter is decremented. If (OVM = 1, enabled) then the
counter is not affected by the operation.
SXM
If sign extension mode bit is set; then the 16-bit operand, addressed by the
”loc16” field, will be sign extended before the addition. Else, the value will be
zero extended.
OVM
If overflow mode bit is set; then the ACC value will saturate maximum positive
(0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
Repeat If the operation is repeatable, then the instruction will be executed N+1
times. The state of the Z, N, C flags will reflect the final result. The V flag will
be set if an intermediate overflow occurs. The OVC flag will count
intermediate overflows, if overflow mode is disabled. If the operation is not
repeatable, the instruction will execute only once.
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