ADDUL P,loc32
6-40
ADDUL P,loc32 Add 32-bit Unsigned Value to P
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
ADDUL P,loc32
0101 0110 0101 0111
0000 0000 LLLL LLLL
1 − 1
Operands P Product register
loc32 Addressing mode (see Chapter 5)
Description Add to the P register the 32-bit content of the location pointed to by the “loc32”
addressing mode. The addition is treated as an unsigned ADD operation:
P = P + [loc32]; // unsigned add
Note: The difference between a signed and unsigned 32-bit add is in the treatment of the
overflow counter (OVC). For a signed ADD, the OVC counter monitors
positive/negative overflow. For an unsigned ADD, the OVC unsigned (OVCU) counter
monitors the carry.
Flags and
Modes
N After the addition, if bit 31 of the P register is 1, then set the N flag;
otherwise clear N.
Z After the addition, if the value of the P register is 0, then set the Z flag;
otherwise clear Z.
C If the addition generates a carry, set C; otherwise C is cleared.
V If an overflow occurs, V is set; otherwise V is not affected.
OVCU The overflow counter is incremented when the addition operation generates
an unsigned carry. The OVM mode does not affect the OVCU counter.
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Add 64-bit VarA + VarB and store result in VarC:
MOVL P,@VarA+0 ; Load P with low 32 bits of VarA
MOVL ACC,@VarA+2 ; Load ACC with high 32 bits of VarA
ADDUL P,@VarB+0 ; Add to P unsigned low 32 bits of VarB
ADDCL ACC,@VarB+2 ; Add to ACC with carry high 32 bits of VarB
MOVL @VarC+0,P ; Store low 32-bit result into VarC
MOVL @VarC+2,ACC ; Store high 32-bit result into VarC
To Next Page
Loading...
Need help?
General
