C27OBJ
6-63
C27OBJ Clear the OBJMODE Bit
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
C27OBJ 0101 0110 0011 0110 X − 5
Note: This instruction is an alias for the “CLRC OBJMODE” operation.
Operands None
Description Clear the OBJMODE status bit in Status Register ST1, configuring the device
to execute C27x object code. This is the default mode of the processor after
reset.
Note: The pipeline is flushed when this instruction is executed.
Flags and
Modes
Clear the OBJMODE bit.
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example ;
Set the device mode from reset to C27x:
Reset:
C27OBJ ; Enable C27x Object Mode
C28ADDR ; Enable C27x/C28x Address Mode
.c28_amode ; Tell assembler we are in C27x/C28x addr mode
C27MAP ; Enable C27x Mapping Of M0 and M1 blocks
.
.
To Next Page
Loading...
Need help?
General
