CLRC M0M1MAP
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CLRC M0M1MAP Clear the M0M1MAP Bit
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
CLRC M0M1MAP 0101 0110 0011 1111 X − 5
Operands
M0M1MAP
Status bit
Description Clear the M0M1MAP status bit in Status Register ST1, configuring the
mapping of the M0 and M1 memory blocks for C27x operation. The
memory blocks are mapped as follows:
M0 M0
M1
C28 at Reset
(M0M1MAP = 1)
Program Space
Data Space
00 0000
00 0400
00 07FF
C27x Compatible Mapping
(M0M1MAP = 0)
M1 M0
M1
Program Space
Data Space
00 0000
00 0400
00 07FF
M0M1
Note: The pipeline is flushed when this instruction is executed. This bit is provided for compatibility for users migrating from
C27x. The M0M1MAP bit should always remain set to 1 for users operating in C28x mode and C2xLP
source-compatible mode.
Flags and
Modes
M0M1MAP
The M0M1MAP bit is cleared.
Example
; Set the device mode from reset to C27x object-compatible mode:
Reset:
CLRC OBJMODE ; Enable C27x Object Mode
CLRC AMODE ; Enable C27x/C28x Address Mode
.c28_amode ; Tell assembler we are in C27x/C28x addr mode
CLRC M0M1MAP ; Enable C27x Mapping Of M0 and M1 blocks
.
.
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