IN loc16,*(PA)
6-111
IN loc16,*(PA) Input Data From Port
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
IN loc16,*(PA) 1011 0100 LLLL LLLL
CCCC CCCC CCCC CCCC
1 Y N+2
Operands loc16 Addressing mode (see Chapter 5)
*(PA) Immediate I/O space memory address
Description Load the location pointed to by the “loc16” addressing mode with the content
of the specified I/O location pointed to by ”*(PA)”:
[loc16] = IOspace[PA];
I/O Space is limited to 64K range (0x0000 to 0xFFFF). On the external
interface (XINTF), the I/O strobe signal (XIS
), if available on your particular
device, is toggled during the operation. The I/O address appears on the
lower 16 XINTF address lines (XA[15:0]) and the upper address lines are
zeroed. The data is read on the lower 16 data lines (XD[15:0]).
Note: I/O space may not be implemented on all C28x devices. See the data sheet for your
particular device for details.
Flags and
Modes
N
If (loc16 = @AX), then after the move AX is tested for a negative condition.
The negative flag bit is set if bit 15 of AX is 1, otherwise it is cleared.
Z
If (loc16 = @AX), then after the move, AX is tested for a zero condition. The
zero flag bit is set if AX = 0, otherwise it is cleared.
Repeat This instruction is repeatable. If the operation follows a RPT instruction, then
it will be executed N+1 times. When repeated, the “(PA)” I/O space address
is post-incremented by 1 during each repetition.
Example
; IORegA address = 0x0300;
; IOREgB address = 0x0301;
; IOREgC address = 0x0302;
; IORegA = 0x0000;
; IORegB = 0x0400;
; IORegC = VarA;
; if( IORegC = 0x2000 )
; IORegC = 0x0000;
IORegA .set 0x0300 ; Define IORegA address
IORegB .set 0x0301 ; Define IORegB address
IORegC .set 0x0302 ; Define IORegC address
MOV @AL,#0 ; AL = 0
UOUT *(IORegA),@AL ; IOspace[IORegA] = AL
MOV @AL,#0x0400 ; AL = 0x0400
UOUT *(IORegB),@AL ; IOspace[IORegB] = AL
OUT *(IORegC),@VarA ; IOspace[IORegC] = VarA
IN @AL,*(IORegC) ; AL = IOspace[IORegC]
CMP @AL,#0x2000 ; Set flags on (AL − 0x2000)
SB $10,NEQ ; Branch if not equal