LOOPNZ loc16,#16bit
6-125
LOOPNZ loc16,#16bit Loop While Not Zero
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
LOOPNZ loc16,#16bit 0010 1110 LLLL LLLL
CCCC CCCC CCCC CCCC
X − 5N+5
Operands loc16 Addressing mode (see Chapter 5)
#16bit 16-bit immediate value (0x0000 to 0xFFFF range)
Description Loop while not zero.
while([loc16] & 16bit != 0);
The LOOPNZ instruction uses a bitwise AND operation to compare the value
referenced by the “loc16” addressing mode and the 16-bit mask value. The
instruction performs this comparison repeatedly for as long as the result of
the operation is not 0. The process can be described as follows:
1) Set the LOOP bit in status register ST1.
2) Generate the address for the value referenced by the “loc16” addressing
mode.
3) If “loc16” is an indirect-addressing operand, perform any specialized
modification to the SP or the specified auxiliary register and/or the ARPn
pointer.
4) Compare the addressed value with the mask value by using a bitwise
AND operation.
5) If the result is 0, clear the LOOP bit and increment the PC by 2. If the
result is not 0, then return to step 1.
The loop created by steps 1 through 5 can be interrupted by hardware
interrupts. When an interrupt occurs, if the LOOPNZ instruction is still active,
the return address saved on the stack points to the LOOPNZ instruction.
Therefore, upon return from the interrupt the LOOPNZ instruction is fetched
again.
While the result of the AND operation is not 0, the LOOPNZ instruction
begins again every five cycles in the decode 2 phase of the pipeline. Thus the
memory location or register is read once every five cycles. If you use an
indirect addressing mode for the “loc16” operand, you can specify an
increment or decrement for the pointer (SP or auxiliary register). If you do,
the pointer is modified each time in the decode 2 phase of the pipeline. This
means that the mask value is compared with a new data-memory value each
time.
The LOOPNZ instruction does not flush prefetched instructions from the
pipeline. However, when an interrupt occurs, prefetched instructions are
flushed.
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