MAC P ,loc16,*XAR7/++
6-148
Flags and
Z After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
Modes
N After the addition, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
C If the addition generates a carry, C is set; otherwise C is cleared.
V If an overflow occurs, V is set; otherwise V is not affected.
OVC If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.
OVM If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
PM The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
Repeat This instruction is repeatable. If the operation follows a RPT instruction, then
it will be executed N+1 times. The state of the Z, N, C and OVC flags will
reflect the final result. The V flag will be set if an intermediate overflow
occurs.
Example
; Calculate sum of product using 16-bit multiply:
; int16 X[N] ; Data information
; int16 C[N] ; Coefficient information (located in low 4M)
; sum = 0;
; for(i=0; i < N; i++)
; sum = sum + (X[i] * C[i]) >> 5;
MOVL XAR2,#X ; XAR2 = pointer to X
MOVL XAR7,#C ; XAR7 = pointer to C
SPM −5 ; Set product shift to ”>> 5”
ZAPA ; Zero ACC, P, OVC
RPT #N−1 ; Repeat next instruction N times
||MAC P,*XAR2++,*XAR7++ ; ACC = ACC + P >> 5,
; P = *XAR2++ * *XAR7++
ADDL ACC,P << PM ; Perform final accumulate
MOVL @sum,ACC ; Store final result into sum