Texas Instruments TMS320C28x User Manual

PUSH XARn
6-297
PUSH XARn Push 32-bit Auxiliary Register Onto Stack
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
PUSH XAR0 0011 1010 1011 1101 1 − 1
PUSH XAR1 1011 0010 1011 1101 1 − 1
PUSH XAR2 1010 1010 1011 1101 1 − 1
PUSH XAR3 1010 0010 1011 1101 1 − 1
PUSH XAR4 1010 1000 1011 1101 1 − 1
PUSH XAR5 1010 0000 1011 1101 1 − 1
PUSH XAR6 1100 0010 1011 1101 X − 1
PUSH XAR7 1100 0011 1011 1101 X − 1
Operands XARn XAR0 to XAR7, 32-bit auxiliary register
Description Push the 32-bit contents of XARn onto the stack pointed to by SP.
Post-increment
SP by 2:
[SP] = XARn;
SP += 2;
Flags and
Modes
None
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
IntX:
PUSH AR1H:AR0H
PUSH XAR2
PUSH XAR3
PUSH XAR4
PUSH XAR5
PUSH XAR6
PUSH XAR7
PUSH XT
.
.
.
; Full context save code for an
; interrupt or trap function
; 16-bit AR1H and 16-bit AR0H store
; 32-bit store of XAR2
; 32-bit store of XAR3
; 32-bit store of XAR4
; 32-bit store of XAR5
; 32-bit store of XAR6
; 32-bit store of XAR7
; 32-bit store of XT

Texas Instruments TMS320C28x Specifications

General

Brand	Texas Instruments
Model	TMS320C28x
Category	Processor
Language	English