SETC Mode
6-320
SETC Mode Set Multiple Status Bits
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
SETC Mode 0011 1011 CCCC CCCC X − 1,2
SETC SXM 0011 1011 0000 0001 X − 1
SETC OVM 0011 1011 0000 0010 X − 1
SETC TC 0011 1011 0000 0100 X − 1
SETC C 0011 1011 0000 1000 X − 1
SETC INTM 0011 1011 0001 0000 X − 2
SETC DBGM 0011 1011 0010 0000 X − 2
SETC PAGE0 0011 1011 0100 0000 X − 1
SETC VMAP 0011 1011 1000 0000 X − 1
Operands mode 8-bit immediate mask (0x00 to 0xFF)
Description Set the specified status bits. The ”mode” operand is a mask value that relates
to the status bits in this way:
“Mode” bit Status Register Flag Cycles
0 ST0 SXM 1
1 ST0 OVM 1
2 ST0 TC 1
3 ST0 C 1
4 ST1 INTM 2
5 ST1 DBGM 2
6 ST1 PAGE0 1
7 ST1 VMAP 1
Note: The assembler will accept any number of flag names in any order. For example:
SETC INTM,TC ; Set INTM and TC bits to 1
SETC TC,INTM,OVM,C ; Set TC, INTM, OVM, C bits to 1
Flags and
SXM
Any of the specified bits can be set by the instruction.
Modes
OVM
TC
C
INTM
DBGM
PAGE0
VMAP
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once
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