SUBBL ACC, loc32
6-343
SUBBL ACC, loc32 Subtract 32-bit Value Plus Inverse Borrow
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
SUBBL ACC, loc32
0101 0110 0101 0100
0000 0000 LLLL LLLL
1 − 1
Operands loc32 Addressing mode (see Chapter 5)
ACC Accumulator register
Description Subtract from the ACC the 32-bit location pointed to by the “loc32”
addressing mode and the logical inversion of the value in the carry flag bit:
ACC = ACC − [loc32] − ~C;
Flags and
Modes
Z After the subtraction, the Z flag is set if the ACC value is zero, else Z is
cleared.
N After the subtraction, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
C The state of the carry bit before execution is included in the subtraction. If the
subtraction generates a borrow, C is cleared; otherwise C is set.
V If an overflow occurs, V is set; otherwise V is not affected.
OVC If(OVM = 0, disabled) then if the operation generates a positive overflow,
then the counter is incremented and if the operation generates a negative
overflow, then the counter is decremented. If(OVM = 1, enabled) then the
counter is not affected by the operation.
OVM If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Subtract two 64-bit values (VarA and VarB) and store result
; in VarC:
MOVL ACC,@VarA+0 ; Load ACC with contents of the low
; 32-bits of VarA
SUBUL ACC,@VarB+0 ; Subtract from ACC the contents of
; the low 32-bits of VarB
MOVL @VarC+0,ACC ; Store low 32-bit result into VarC
MOVL ACC,@VarA+2 ; Load ACC with contents of the high
; 32-bits of VarA
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