Reference Tables for C2xLP Code Migration Topics
Table D−9. C2xLP and C28x Differences in Instructions and Registers (Continued)
C28xC2xLPMigration topic
4
GREG register Memory mapped register Memory mapped register in XINTF
Global Space may or may not be im-
plemented on a particular device.
See the device data sheet for details.
5 ARx registers ARx registers are 16−bit only
LAR AR1, #0FFFFh
ADRK #1
Result:
AR1 = 0x0000h
XARn registers are 32 bits. Some in-
structions access only the lower
16 bits known as ARn
MOV XAR1, #0FFFFh
ADD XAR1,#1
Result:
XAR1 = 0x10000h
6 2s complement subtraction
to ARx
LAR AR1, #0FFFFh
ADRK #0FE
Result:
AR1 = 0xFFFDh
MOV XAR1, #0FFFFh
ADD XAR1,#0FE
Result:
XAR1 = 0x1FFFDh
7 I/O instructions Supports IN, OUT instructions Supports IN, OUT,UOUT
I/O Space may or may not be imple-
mented on a particular device. See
the device datasheet for details
.
8 Stack Uses 8−deep Hardware stack
C2xLP Compiler uses AR1 as
Stack Pointer
Uses software stack pointer register
(SP)
Compiler will use SP register, as
stack pointer
9 Program counter 16 bits in size
B 5000h ; Branch to 5000
; address
22 bits in size
The C28x assembler will use special
C2xLP compatible instructions that
force the upper program address
lines to 0x3F thus creating a 16−bit
C2xLP compatible PC.
B 0x3F5000 ;
or
XB 5000h
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