Condition Tests on Flags
E-5C2xLP Instruction Set Compatibility
Table E−2. C2xLP Instructions and C28x Equivalent Instructions (Continued)
C2xLP C28x
Instruc-
tion
SizeCyclesMnemonicInstruc-
tion
SizeCyclesMnemonic
CLRC XF/OVM/SXM/TC/C n+1 16 CLRC XF/OVM/SXM/TC/C 2,1 16
CLRC CNF n+1 16 Not applicable
CMPL n+1 16 NOT ACC 1 16
CMPR 0/1/2/3 n+1 16 CMPR
0/1/2/3 1 16
DMOV loc16 n+1 16 DMOV
loc16 n+1 16
IDLE 1 16 IDLE
516
IN loc16,PA 2(n+1) 32 IN
loc16,*(PA) n+2 32
INTR K 4 16 Not applicable
LACC
loc16[,0] n+1 16 MOV
ACC,loc16 [<< 0] 1 16
LACC loc16,1..15 n+1 16 MOV
ACC,loc16 << 1..15 1 32
LACC loc16,16 n+1 16 MOV
ACC,loc16 << 16 1 16
LACC
#16bit,0..15 2 32 MOV
ACC,#16bit << 0..15 1 32
LACL loc16 n+1 16 MOVU
ACC,loc16 1 16
LACL #8bit 1 16 MOVB
ACC,#8bit 1 16
LACT loc16 n+1 16 MOV
ACC,loc16 << T 1 32
LAR ARn,loc16 2(n+1) 16 MOVZ
ARn,loc16 1 16
LAR ARn,#8bit 2 16 MOVB
XARn,#8bit 1 16
LAR ARn,#16bit 2 32 MOVL
XARn,#22bit 1 32
LDP loc16 2(n+1) 16 Not applicable
LDP #9bit 2 16 MOVZ DP,#10bit >> 1 1 16
LPH loc16 n+l 16 MOV
PH,loc16 1 16
LST #0/1,loc16 2(n+1) 16 See Table D−7
LT loc16 n+l 16 MOV T,loc16 1 16
LTA
loc16 n+l 16 MOVA T,loc16 n+1 16
†
True/False