Texas Instruments TMS320C28x

Condition Tests on Flags
Table E−2. C2xLP Instructions and C28x Equivalent Instructions (Continued)
C2xLP C28x
Instruc-
tion
SizeCyclesMnemonicInstruc-
tion
SizeCyclesMnemonic
SPLK #0x0000,loc16 2 32 MOV loc16,#0 n+1 16
SPLK #16bit,loc16 2 32 MOV loc16,#16bit n+1 32
SPM 0 1 16 SPM
0116
SPM 1 1 16 SPM
1 (or +1) 1 16
SPM 2 1 16 SPM
2 (or +4) 1 16
SPM 3 1 16 SPM
3 (or −6) 1 16
SQRA loc16 n+l 16 SQRA
loc16 n+1 32
SQRS loc16 n+l 16 SQRS
loc16 n+1 32
SST #0/1,loc16 n+l 16 Not applicable
SUB loc16[,0] n+l 16 SUB ACC,loc16 {<< 0} n+1 16
SUB loc16,1..15 n+l 16 SUB
ACC,loc16 << 1..15 n+1 32
SUB loc16,16 n+l 16 SUB
ACC,loc16 << 16 n+1 16
SUB #8bit 1 16 SUBB
ACC,#8bit 1 16
SUB #16bit[,0..15] 2 32 SUB
ACC,#16bit {<< 0..15} 1 32
SUBB loc16 n+l 16 SUBU
ACC,loc16 1 16
SUBC loc16 n+l 16 SUBCU
ACC,loc16 n+1 16
SUBS loc16 n+l 16 SUBU
ACC,loc16 n+1 16
SUBT loc16 n+l 16 SUB
ACC,loc16 << T n+1 32
TBLR loc16 n+3 16 XPREAD
loc16,*AL n+4 32
TBLW loc16 n+3 16 XPWRITE
*AL,loc16 n+4 32
TRAP 4 16 Not applicable
XOR loc16 n+l 16 XOR ACC,loc16 n+1 16
XOR #16bit,16 2 32 XOR
ACC,#16bit<<16 1 32
XOR #16bit[,0..15] 2 32 XOR
ACC,#16bit [<< 0..15] 1 32
ZALR
loc16 n+l 16 ZALR ACC,loc16 1 32
†
True/False