G-1
Appendix A
Glossary
16-bit operation: An operation that reads or writes 16 bits.
32-bit operation: An operation that reads or writes 32 bits.
A
absolute branch: A branch to an address that is permanently assigned to
a memory location. See also offset branch.
ACC: See accumulator (ACC).
access: A term used in this document to mean read from or write to. For ex-
ample, to access a register is to read from or write to that register.
accumulator (ACC): A 32-bit register involved in a majority of the arithmetic
and logical calculations done by the C28x. Some instructions that affect
ACC use all 32 bits of the register. Others use one of the following por-
tions of ACC: AH (bits 31 through 16), AL (bits 15 through 0), AH.MSB
(bits 31 through 24), AH.LSB (bits 23 through 16), AL.MSB (bits 15
through 8), and AL.LSB (bits 7 through 0).
address-generation logic: Hardware in the CPU that generates the ad-
dresses used to fetch instructions or data from memory.
address reach: The range of addresses beginning with 00 0000
16
that can
be used by a particular addressing mode.
address register arithmetic unit (ARAU): Hardware in the CPU that gen-
erates addresses for values that must be fetched from data memory. The
ARAU is also the hardware used to increment or decrement the stack
pointer (SP) and the auxiliary registers (AR0, AR1, AR2, AR3, AR4, AR5,
XAR6, and XAR7).
addressing mode: The method by which an instruction interprets its oper-
ands to acquire the data and/or addresses it needs.
AH: High word of the accumulator. The name given to bits 31 through 16 of
the accumulator.
Appendix G
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