Status Register ST1
2-38
When the CPU services an interrupt, the current value of INTM is saved on the stack
(when ST1 is saved on the stack), and then INTM is set. Upon return from the interrupt,
INTM is restored from the stack.
This bit can be individually set and cleared by the SETC INTM instruction and
CLRC INTM instruction, respectively. At reset, INTM is set. The value in INTM does not
cause modification to the interrupt flag register (IFR), the interrupt enable register (IER),
or the debug interrupt enable register (DBGIER).
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