Texas Instruments TMS320F2837 D Series Workshop Guide And Lab Manual

Fast Interrupt Response Manager
1 - 12 TMS320F2837xD Microcontroller Workshop - Architecture Overview
Fast Interrupt Response Manager
The fast interrupt response manage is capable of automatically performing context save of critical
registers. This results in the ability of servicing many asynchronous events with minimal latency.
The F28x7x implements a zero cycle penalty to do 14 registers context saved and restored during
an interrupt. This feature helps reduces the interrupt service routine overheads.
C28x Fast Interrupt Response Manager
 192 dedicated PIE
vectors
 No software decision
making required
 Direct access to RAM
vectors
 Auto flags update
 Concurrent auto
context save
28x CPU Interrupt logic
C28x
CPU
INTM
192
Peripheral Interrupts 12x16 = 192
12 interrupts
INT1 to
INT12
PIE
Register
Map
PIE module
For 192
interrupts
T ST0
AH AL
PH PL
AR1 (L) AR0 (L)
DP ST1
DBSTAT IER
PC(msw) PC(lsw)
Auto Context Save
IFR IER
By incorporating the very fast interrupt response manager with the peripheral interrupt expansion
(PIE) block, it is possible to allow up to 192 interrupt vectors to be processed by the CPU. More
details about this will be covered in the reset, interrupts, and system initialization modules.

Texas Instruments TMS320F2837 D Series Specifications

General

Brand	Texas Instruments
Model	TMS320F2837 D Series
Category	Microcontrollers
Language	English