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Texas Instruments TMS320F2837 D Series - I2 C Summary

Texas Instruments TMS320F2837 D Series
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Inter-Integrated Circuit (I2C)
12 - 18 TMS320F2837xD Microcontroller Workshop - Communications
I2C Arbitration
Arbitration procedure invoked if two or more master-
transmitters simultaneously start transmission
Procedure uses data presented on serial data bus (SDA) by
competing transmitters
First master-transmitter which drives SDA high is overruled
by another master-transmitter that drives SDA low
Procedure gives priority to the data stream with the lowest
binary value
1
0
1
0
0
1
0
1
1
0
0
1
0
1
SCL
SDA
Data from
device #1
Data from
device #2
Device #1 lost arbitration
and switches to slave-
receiver mode
Device #2
drives SDA
I2C Summary
I2C Summary
Compliance with Philips I2C-bus
specification (version 2.1)
7-bit and 10-bit addressing modes
Configurable 1 to 8 bit data words
Data transfer rate from 10 kbps up to
400 kbps
Transmit FIFO and receive FIFO

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