DMA Registers
DmaRegs.name (lab file: Dma.c)
DMACTRL DMA Control Register
PRIORITYCTRL1 Priority Control Register 1
MODE Mode Register
CONTROL Control Register
BURST_SIZE Burst Size Register
BURST_COUNT Burst Count Register
SRC_BURST_STEP Source Burst Step Size Register
DST_BURST_STEP Destination Burst Step Size Register
TRANSFER_SIZE Transfer Size Register
TRANSFER_COUNT Transfer Count Register
SRC_TRANSFER_STEP Source Transfer Step Size Register
DST_TRANSFER_STEP Destination Transfer Step Size Register
SRC_ADDR_SHADOW Shadow Source Address Pointer Register
SRC_ADDR Active Source Address Pointer Register
DST_ADDR_SHADOW Shadow Destination Address Pointer Register
DST_ADDR Active Destination Address Pointer Register
DMACHSRCSELx
(x = 1 or 2) Trigger Source Selection Register
Register Description
DMA CHx Registers
Refer to the Technical Reference Manual for a complete listing of registers
DMA Control Register
DmaRegs.DMACTRL
HARDRESETPRIORITYRESET
015 - 2
reserved
1
Priority Reset
0 = writes ignored (always reads back 0)
1 = reset state-machine after any pending
burst transfer complete
Hard Reset
0 = writes ignored (always reads back 0)
1 = reset DMA module